Real world power system fault currents can contain varying amounts of exponentially decaying DC offset from none to very high levels, depending on the system X/R ratio and the fault inception angle. The fault inception angle in the real world is, of course, a random value. The following diagram shows such a case for a phase-to-ground fault. Similar effects will occur for phase-phase, 3-phase, and 2-phase-to-ground faults.
The highest DC offset will occur at fault inception angles of –90 and 90 degrees, and the lowest DC offset will occur at 0 and 180 degrees. As the system X/R ratio increases, the time for the DC offset to decay to zero becomes longer.
This DC offset can adversely affect the performance of relays. First, the pickup level and the operating time can be affected, especially in those relays that do not employ digital filtering techniques to remove the DC component. Note that this does not imply that digital relays are necessarily immune to the effects of DC offset. A second effect is the possibility of CT saturation causing distortion in the current, affecting the ability to operate and/or operate time. Only the first of these two is discussed in this paper. The reader is directed to references [2, 3, 4 and 6].
To quantify the effects of DC offset, we took a 60Hz GE IAC51B electromechanical time-overcurrent relay and measured the variation the pickup of the instantaneous overcurrent element versus both fault inception angle and simulated system X/R. The prefault current was set to zero.
The above graph shows the test results. It can be easily seen that the DC offset as caused by varying fault inception angles can result in greatly reduced actual pickup level. The worst case of pickup 25% below the nominal setting occurs at 90 and 270 (-90) degrees where the DC offset is the highest. The 100% level represents the steady-state pickup level. There is a slight difference between the steady-state pickup level and the maximum transient pickup level. In addition, the higher the system X/R ratio the greater the increase in sensitivity.
Similarly, the operating time was measured under the same conditions. The following graph shows the test results.
The operating time varies from approximately 1.4 to 2.5 cycles. There is less of a pronounced effect on operation time compared to the pickup level, but there is a definite relationship. As one would expect since the element is basically an RMS responding element, the faster operation times tend to occur where there are high levels of DC offset (fault inception angles near 90 and 270 (-90) degrees. In real-world situations, however, this may be actually cause delayed operation in cases where the DC offset causes CT saturation, and therefore waveform distortion. Results showing these effects are discussed in references  and .
System X/R appears to have less of an effect, probably because of the relatively high-speed operation of the element.
An ABB HU transformer differential protection relay’s instantaneous unit was tested in a similar fashion varying fault inception angle and simulated system X/R which in turn simulated different levels of exponentially decaying DC offset.
The graph below shows that the actual measured pickup level is similar to the instantaneous overcurrent element’s performance, with the lowest pickup levels at maximum DC offset points of 90 degrees and –90 degrees, although the maximum reduction in pickup level is less than 15%, compared to –25% on the IAC instantaneous element. The 100% level represents the steady-state pickup level. There is a slight difference between the steady-state pickup level and the maximum transient pickup level. System X/R does have an effect on performance, but not as pronounced as on the IAC instantaneous element since the plots are closer together for different X/R ratios.
Note that these results are despite statements in the manufacturer’s technical documentation stating that the instantaneous unit responds “essentially only to the sine wave component of an internal fault … The dc component of the fault is bypassed by the (relay’s internal) transformer primary”.
The following graph below shows the operating time performance for the HU instantaneous differential element versus fault inception angle. Again, the shortest operating times occur at points of highest DC offset (90 degree and –90 (270) degree fault inception angle).
Note again a similar variation showing that the relay’s operate time can vary essentially by 100% (1 to 2 cycles) depending on the degree of DC offset in the fault current.
Next, we tested a 60Hz SEL-121F relay 50H instantaneous overcurrent element in the same fashion, with 3 trials for each 30-degree step. We measured the variation the pickup of the instantaneous overcurrent element versus both fault inception angle and simulated system X/R. The prefault current was set to zero.
The above graph shows the test results. The DC offset as caused by varying fault inception angles caused only very minor (+/- 2%) variation in the pickup level compared to the 15 to 25% variation in the electromechanical elements. However, there was more scatter in the test results likely due to the discrete sampling method used by the relay. The greatest deviation from the setting occurs near 90 and 270 (-90) degrees where the DC offset is the highest, similar to the electromechanical relay response. Varying X/R ratio had minimal effect on the results. These results show the effectiveness of the digital filtering employed in the relay, however also show that the filter is not a perfect one.
Similarly, the operating time was measured under the same conditions with 3 trials for each 30-degree step. The following graph shows the test results.
The operating time varies from approximately 1.3 to 1.8 cycles, only about one-half as much of a spread compared to the IAC relay. Again faster operation times tend to occur where there are high levels of DC offset (fault inception angles near 90 and 270 (-90) degrees. Again, there was scatter in the test results compared to the electromechanical element, due to the discrete sampling method used, and the actual output relay delay variation. System X/R appears to have little of an effect.
Next, we tested a 60Hz SEL-321 relay 50Q instantaneous negative sequence overcurrent element. The 3I2 pickup setting was 5A secondary, (i.e. 1.67A negative sequence current) and we applied 1A prefault current a balanced 3-phase 15A fault at the MTA. The test was first performed without DC offset simulation. The results are in the left figure below. The digital trace on the bottom shows a momentary operation of the negative sequence overcurrent element. In actual fact, the negative sequence current was zero for the entire duration of the test.
The second test was performed with proper DC offset simulation representing a system time constant of 50ms. The results are in the right figure above. Note that the negative sequence overcurrent element did not operate.
By analyzing the relay event report further insight can be obtained regarding the relay operation. The graph below shows an analysis of the phase current magnitudes and computed negative sequence current magnitude for the test #1 (without DC offset simulation). We can see clearly that the relay measures a negative sequence current above the pickup level (1.67A) shortly after the fault inception. Note also that the relay requires more than 1 cycle before it measures the full fault current amplitude.
What we are basically dealing with here is the transient response of the digital relay, in particular, the transient response of the digital filters. The transient response is how the relay responds to a step change (in amplitude, phase angle or both simultaneously). No relay is perfect; that is, no relay will measure an instantaneous step change in amplitude or phase angle when a step change occurs in the AC magnitude or phase angle. The relay must attempt to filter out noise, harmonics, and the DC offsets without excessive phase delay to impact the operate time, and without excessive overshoot that may cause overreach. These requirements, in principle, conflict with each other, and a compromise must be settled upon by the designer .
In the first cycle of the fault, the relay is trying to estimate the magnitude and phase angle of each current and voltage. The digital filters employed are designed with the assumption that the current cannot change instantaneously due to the inductive nature of the power system, and DC offsets will occur when the AC amplitude changes suddenly. In test #1 where the simulated system time constant is 0, (unrealistic waveforms), the relay’s estimations of the DC offset, give it inaccurate AC component estimations, resulting in a calculated non-zero negative sequence current, which causes the 50Q element to operate. In test #2 where the simulated system time constant is 50ms, (realistic waveforms), the relay’s estimations of the DC offset, are more accurate, giving it more accurate AC component results and the 50Q element does not operate.
In actual fact, when we analyzed the relay event report for test #2, we find that the relay still measures some negative sequence current in the first cycle of the fault, but the level is low enough that the 50Q element does not operate.
Note that even though we were testing an overcurrent element, voltages were also injected since the 50Q element is supervised by a negative sequence impedance directional element. Thus the transient response of the digital filters for the voltages also plays a part in the performance of the relay in this case.
Note that the instantaneous negative sequence overcurrent element is generally not used for tripping, so its transient performance is not of major consequence.
Finally, we tested a 60Hz REL512 line protection relay’s phase distance element. Using classical testing methods* we measured the distance element characteristic first without and then with proper DC offset on the current waveforms at a 90-degree fault inception angle. The results are illuminating. When proper DC offset simulation was not performed, the relay overreached significantly (9.8% at the MTA). The unrealistic sudden change in current at the fault inception causes an incorrect estimation of the AC current quantities, leading to momentary operation of the relay just after the fault inception. Note that this would not happen in real-world fault current waveforms. [see Reference 8]
When proper DC offset simulation was performed with a 20ms time constant, the relay characteristic was the circular as expected with negligible error. Typical test waveforms with proper DC offset simulation are shown in the figure below.
It is interesting to note that in actual fact, the relay reach setting was 4 ohms and the relay has a transient underreach of 3%. Steady-state testing showed that the steady-state reach was 3.92 ohms. For the purpose of comparison in this example, however, we drew the expected characteristic with a reach of 3.8 ohms, since all tests were dynamic, simulating real-world faults.
The lessons of this example are applicable to latter generations of digital line, bus, and transformer protection relays that all use sub-cycle tripping algorithms and are sensitive to fault inception angle and dc offset. Sub-cycle protection algorithms allow for faster clearing times, improving power system stability as well as more secure protection trip/block decisions before the onset of CT saturation due to DC offsets. In general, these algorithms are fundamental to the design of the protection elements and cannot simply be disabled if sub-cycle tripping is not required. If proper, realistic DC offset current waveforms are not simulated they may not operate as expected, exhibit delayed operation, or even seem to mis-operate.